To run a computer program, a computer repetitively carries out a sequence of functions, typically fetching an instruction held at a given address, decoding the instruction, accessing an operand for use by the instruction, executing the instruction, storing the result of the execution and determining the next instruction address. Where time constraints are unimportant, the entire sequence of functions may be carried out before the next sequence is initiated. However, processing speed is normally highly significant, and to avoid delays pipelining systems have been developed, in which, for example, the execution of a first instruction is occurring at the same time as the operand for a second instruction is being accessed, a third instruction is being decoded, and a fourth instruction is being read. Such a system avoids the delay caused by waiting for all the steps in processing an instruction to be completed; however a problem will occur where an instruction contains a test whose result determines the address of the next instruction to be executed. An instruction of this type is known as a conditional jump.
The consequence of the presence of a conditional jump instruction is that the instruction typically has to pass through several pipeline stages before the test is resolved, and before the next instruction to be fetched can be determined with certainty. This can delay the pipeline process.
A program sequence may also include non-conditional jump instructions. Such instructions, if executed, result in the program sequence jumping to a new instruction.
For the purposes of the present description and claims, the term "branch instruction" will be used to include both conditional and non-conditional jump instructions.
In this specification the term instruction includes primitive operations which may be included in a VLIW system using Very Long Instruction Words. An instruction word or sequence may therefore comprise a VLIW instruction.